F18A Features

 
Since the F18A is now shipping (finally!), and the feature list is stable (heh, yeah right) I need to get my website updated, and eventually write some documentation so people can use the enhance features.  For now I will try to make a comprehensive list of the features with a brief explanation.
 
I assume you have basic knowledge of the original VDPs features.  So, aside from reproducing all the original functionality of the 9918A, the F18A has the following enhancements:
 
* 640480@60 analog VGA output to drive a standard computer monitor.  This was the main reason for the F18As existence at all.  640480 was chosen because it is supported by every VGA monitor since about 1987.  Also, to support the original 256192 pixel resolution I needed to double each VGA pixel to make one fat pixel, and 256*2=512 with a 64-VGA-pixel border on each side (640-512=128/2=64).  800600 was also considered with 33 fat pixels, but  I cant remember now, but I spent a lot of time on which VGA resolution to use and 640480 won.
 
* A binary compatible TMS9900-based GPU.  This is a full-blown CPU inside the F18A, which basically gives you a 100MHz 9900 as a co-processor with direct access to the VRAM, VDP registers, and a private 2K of RAM above the original 16K of VRAM.  The GPU performs a complete fetch, decode, execute, store cycle in about 150ns (nano seconds) average, but it depends on the addressing modes of the instruction, and the instruction itself (jump and branch instructions only take around 60ns).  This give a performance factor of about 5 to 7 MIPS, or about like the 68000 in and Amiga.   The GPU can easily be used to perform per-raster operations, complex rendering, collision detection, bit manipulation, etc.
 
* Horizontal and vertical scroll registers with page support (similar to the NES).  Each scroll register is byte and can scroll the screen from 0-255 pixels.  Using the two page bits, the name table can be expanded in the horizontal and/or vertical directions.  This allows for up to a 6460 virtual tile map, with a 3230 window (i.e. the screen), to be scrolled smoothly at the pixel level just by changing a single VDP register.
 
* All 32 sprites can be displayed on the same scan line.  The 4-sprite maximum on a horizontal line limitation was removed.  The maximum number of displayable sprites is also controlled by a new VDP register and can be programmatically set between 1 and 31 (31 is the *number* of the sprite that is the maximum, and sprites are number 0 to 31 for a total of 32).
 
* Removed the VDP speed limit, so you can not over run reading or writing to the F18A.  The F18As internal state machines run at 100MHz, so they can easily keep up with the host system.
 
* 80-column mode (of course )  The blink and inverse colors were not implemented.  However, the text modes can use the enhanced tile features, so you can have colored text, sprite, and the bitmap layer in 40 or 80 column text modes.
 
* 64 programmable 12-bit color registers, which means a 4096 color palette.
 
* 30-row mode, inspired by the NES.  GM1 can now be 3224 tiles or 3230 tiles (256240 resolution).
 
* A real bitmap layer with up to 4 colors per pixel (2-bit color). This is not a video *mode*, the bitmap layer is available in all modes.  The bitmap layer can have its width and height set from 1 to 255 so it is very efficient with memory use.  The X,Y location for the bitmap layer can also be set, as well as priority over the tile layer and transparency.
 
* Enhanced attributes for tiles and sprites.  Each tile or sprite can flip their pattern on the x and/or y axis, specify a palette to use, and tiles can set priority over sprites (on a per tile bases), as well as allowing color 0 to be shown or treated as transparent.
 
* Each sprite can set its own 88 or 1616 size independently.
 
* Sprites can be linked, which allows you to move multiple sprites by updating just one sprites coordinates.
 
* 1-bit, 2-bit, and 3-bit color modes for tiles and sprites, which means 2, 4, or 8 colors for tiles and sprites.  Tiles and sprites can set their color depth independently.
 
* A fixed tile map that allows individual tiles to not be affected by scrolling.
 
* Two 32-bit 100MHz counters, one dedicated to the GPU, the other for the host CPU.  The counter can be initialized to a specific, single stepped, or set to free run.
 
* Two 32-bit 100MHz Linear Feedback Shift Register (LFSR) random number generators, one dedicated to the GPU, the other for the host CPU.  The RNG can be seeded, single stepped, or set to free run.
 
* Programmable horizontal scan line interrupt.
 
* Read access to all VDP registers.
